Og2ForVector

• Version: V2R2
• Status: OK
• Date: 2025/01/20
• commit: xxx

Overall Design

Overall Block Diagram

Overall Block Diagram

Interface List

See interface document

Features

For normal scalar instructions, after passing through the DataPath, they are directly sent to the BypassNetwork, where the final operands are generated through multiplexing. For vector computation instructions and vector memory access instructions, due to the tighter timing for reading the vector register file compared to scalars, and also the high timing requirements of the vector execution unit for the first cycle's data, an additional OG2 stage is introduced after passing through the DataPath before entering the BypassNetwork for multiplexing.

The Og2ForVector module only performs simple pipelining (register staging) and no logic operations; whether an instruction can enter the OG2 stage only depends on global cancellation. The Og2ForVector module contains the pipeline stage registers for the OG2 stage. An instruction in the OG1 stage can enter the OG2 stage if it has not received a load cancel or a redirect flush.

Another function of the Og2ForVector module is to send responses from the OG2 stage to the issue queue. The OG2 stage has no self-induced cancellation. Whether OG2 can successfully send to the next stage only depends on whether the next stage can receive the instruction. If the next stage cannot receive, the instruction cannot enter the execution unit. In this case, a block status needs to be responded to the issue queue, informing the issue queue that the instruction needs to be re-issued later. If the next stage can receive, for vector computation instructions, the instruction will definitely execute successfully. In this case, a success status is responded to the issue queue, informing the issue queue to clear the corresponding queue entry. For vector memory access instructions, the successful execution can only be determined after entering the memory access execution unit. Here, only an uncertain status is responded to the issue queue, telling it to keep the entry unchanged. The execution unit will send the clear or re-issue response later.