Vector Memory Access
Submodule List
| Submodule | Description |
|---|---|
| VLSplit | Vector Load uop Split Module |
| VSSplit | Vector Store uop Split Module |
| VLMergeBuffer | Vector Load flow Merge Module |
| VSMergeBuffer | Vector Store flow Merge Module |
| VSegmentUnit | Vector Segment Execution Module |
| VfofBuffer | Vector fault only first Instruction Writeback VL Register uop Collection and Writeback Module |
Function Description
- Supports complete RVV 1.0 memory access instructions
- Supports out-of-order scheduling of Vector Load/Store instructions
- Supports out-of-order execution of Uops split from Vector Load/Store instructions
- Supports vector out-of-order violation checking and recovery
- Supports unaligned vector memory access
- Does not support vector memory access to non-memory space
Parameter Configuration
| Parameter | Configuration (Number of Entries) |
|---|---|
| VLEN | 128 |
| VLMergeBuffer | 16 |
| VSMergeBuffer | 16 |
| VSegmentBuffer | 8 |
| VFOFBuffer | 1 |
Function Overview
Before entering the VLSIssueQueue, the Index of the Load Queue or Store Queue will be allocated during the Dispatch stage. After vector memory access instructions are split into uops in the backend, they will first be decoded in the Vsplit module, where the mask and address offset are calculated, and Mergebuffer entries are requested simultaneously. In the new vector memory access architecture, the scalar LoadUnit & StoreUnit, as well as the Load Queue & Store Queue, will be reused.
Vector Load and Store share two Issue Queues. For Vector Load, the two Issue Queues interface with two VLSplits. For Vector Store, the two Issue Queues interface with two VSSplits. The two VLSplits correspond to LoadUnit0 and LoadUnit1 respectively. The two VSSplits correspond to StoreUnit0 and StoreUnit1 respectively. When a Vector Load needs to be replayed by the Replay Queue, it may be replayed to another loadunit. After the vector memory access finishes execution in the pipe, it will be summarized and written back by the mergebuffer.
Overall Block Diagram
Overall block diagram to be updated